Intel's Execute Disable Bit (XD Technology)
The Problem - Malicious Code Threatens Your Valuable Data
Malicious buffer overflow attacks pose a serious security threat to all businesses, heavily increasing IT resource demands and possibly destroying critical company information. In a standard buffer attack the malicious worm creates a flood of code that overwhelms the processor, allowing the worm to spread itself to the network as well as to other computers.
The Solution

Execute Disable Bit capability is an enhancement to 32-bit IntelŪ architecture designed to increase overall system security at the software code execution level.

 An IA-32 processor with Execute Disable Bit capability can protect data pages against being used by malicious software to execute code. The processor provides page protection in either of the following modes:

1) Legacy protected mode, if Physical Address Extension (PAE) is enabled

2) IA-32e mode, when IntelŪ Extended Memory 64 Technology (IntelŪ EM64T) is enabled

Note that entering IA-32e mode requires enabling PAE (Physical Address Extension). While the Execute Disable Bit capability does not introduce new instructions, it does require operating systems to operate in a PAE-enabled environment and to establish a page-granular protection policy for memory.

Replacing older computers with Execute Disable Bit-enabled systems can halt worm attacks, reducing the need for virus related repairs. In addition, Execute Disable Bit may eliminate the need for software patches aimed at buffer overflow attacks. By combining Execute Disable Bit with anti-virus, firewall, spy ware removal, e-mail filtering software, and other network security measures, IT managers can free IT resources for other critical areas.
Where it Can Be Found
While first released for the IntelŪ ItaniumŪ processor family in 2001, XD technology is now to be found on certain new  high-performance desktop systems using Socket 775 processors designated with "J" in the processor model number (see below for more details).
 
Processor Name ASI SKU Clock Architecture Cache FSB HT XD
Intel Celeron D - 345J N/A 3.06 GHz 90 nm, LGA775 256KB 533 Mhz   x
Intel Celeron D - 340J 31033 2.93 GHz 90 nm, LGA775 256KB 533 Mhz   x
Intel Celeron D - 335J 31070 2.80 GHz 90 nm, LGA775 256KB 533 Mhz   x
Intel Celeron D - 330J 31068 2.66 GHz 90 nm, LGA775 256KB 533 Mhz   x
Intel Celeron D - 325J 31067 2.53 GHz 90 nm, LGA775 256KB 533 Mhz   x
Intel PentiumŪ 4 - 570J 33403 3.80 GHz 90 nm, LGA775 1MB L2 800 MHz x x
Intel PentiumŪ 4 - 560J 33828 3.60 GHz 90 nm, LGA775 1MB L2 800 MHz x x
Intel PentiumŪ 4 - 550J N/A 3.40 GHz 90 nm, LGA775 1MB L2 800 MHz x x
Intel PentiumŪ 4 - 540J 35460 3.20 GHz 90 nm, LGA775 1MB L2 800 MHz x x
Intel PentiumŪ 4 - 530J 34443 3.00 GHz 90 nm, LGA775 1MB L2 800 MHz x x
Intel PentiumŪ 4 - 520J N/A 2.80 GHz 90 nm, LGA775 1MB L2 800 MHz x x

Execute Disable Bit currently requires one of the following operating systems to support it:
  • Microsoft Windows* Server 2003 with Service Pack 1
  • Microsoft Windows* XP* with Service Pack 2
  • SUSE Linux* 9.2
  • Red Hat Enterprise Linux 3 Update 3