This combination will deliver higher-performing, yet more energy-efficient processors that will spur more capable, stylish, silent and smaller mobile and desktop PCs while saving on electricity usage. Intel is touting the C2D to deliver up to a 40% increase in performance while consuming 40% less electricity when compared to the Pentium D 960 processor. To quote Intel CEO Paul Otellini, "The Core™2 Duo processors are simply the best processors in the world. Not since Intel introduced the Pentium® processor has the industry seen the heart of the computer reinvented like this. This is not just an incremental change; this is a revolutionary leap." Otellini also said that with the debut of the C2D, Intel has definitely regained the performance crown from AMD, and early reviews of the Core™ 2 Duo have been simply stellar with performance gains as high as 70% over the AMD AM2 on CPU-bound benchmark tests. Otellini also predicted that the "Core™ 2 Duo is the growth engine for the next 500 million new internet users."
 
Brand New and Improved
 
Starting with these two new Intel® Core™2 Duo and Intel® Core™2 Extreme brands, the “2” designation signals the arrival of a new generation of technology to the Intel® Core™ processor line. The first "Core™" processor debuted in Q1 in the form of the Core™ Duo mobile processors, but the Core™ 2 line adds a bevy of new features to enhance performance and reduce power consumption. You will see these new mobile Core™ 2 Duo processors code-named "Merom" starting to trickle into ASI warehouses in the September timeframe. In order to be consistent with current Intel Core™ processor naming, Intel will continue to use such terms as “Duo” to effectively indicate the number of processing cores per product.

These two new brands will have new logos (can be seen below) which are consistent with the new Intel brand and corporate identity introduced earlier this year, yet visually distinctive in both design and coloring, to help easily identify these powerful state-of-the-art products as new and improved. These new dual-core processors for the desktop will include the industry’s largest integrated cache called Intel® Advanced Smart Cache (either 4MB or 2MB) that includes a unique design for faster performance on memory intensive applications. These products will also support such features as enhanced security, virtualization and manageability built right into the processors. These desktop Core™ 2 Duo processors will mark the arrival of Intel's cleanest dual-core design to date. Intel's existing 9XX and 8XX dual-core processors use two distinct cores, which communicate with each other over the front-side bus. In contrast, Conroe will have its two cores on the same silicon die (monolithic design), enabling faster inter-processor communication and a shared L2 cache to radically enhance performance.

 
Core™2 Duo processors E6000 Family (E6300 - E6700)

The basic Core™ 2 Duo family will consist of four processors: the E6300, E6400, E6600, and E6700. They will run at clock speeds of 1.86 GHz, 2.13 GHz, 2.40 GHz, and 2.66 GHz, respectively. The E6300 and E6400 will be equipped with a 2MB L2 cache; the other two models will have a 4MB L2 cache. Using Intel's 65 nm manufacturing technology, all come with a 1,066-MHz front-side bus, and will ack 291 million transistors onto a 143 square-millimeter slice of silicon.

ASI SKU	Processor Number	Clock Speed	Cache Size L2	Front Side Bus	Dual Core	Intel® VT	EIST	Intel® EM64T	Execute Disable Bit	sSpec#	Package
50171	E6700	2.66 GHz	4MB	1066MHz						SL9S7	LGA 775
50170	E6600	2.40 GHz	4MB	1066MHz						SL9S8	LGA 775
50169	E6400	2.13 GHz	2MB	1066MHz						SL9S9	LGA 775
50168	E6300	1.86 GHz	2MB	1066MHz						SL9SA	LGA 775

 
Core™ 2 Extreme Edition X6800

At the top of the line, the Core™ 2 Extreme processor is being aimed for gaming systems and graphics workstations. It's designated as the X6800 with a clock speed of 2.93 GHz, and gives you the ability to change the clock multiplier in able to push the performance envelope even further. This is the first Intel processor to officially have an un-locked clock multiplier where you can carefully overclock your system greater than the 11:1 stock clock multiplier ratio. Later in Q4 the next C2E will arrive as a quad-core desktop processor code-named "Kentsfield" and will surely keep Intel the performance leader on the desktop.

ASI SKU	Processor Number	Clock Speed	Cache Size L2	Front Side Bus	Dual Core	Intel® VT	Enhanced Intel SpeedStep® Technology	Intel® EM64T	Execute Disable Bit	sSpec#	Package
50918	X6800	2.93 GHz	4MB	1066MHz						SL9S5	LGA 775

 
Intel Core™ Microarchitecture:  Energy-Efficient Performance
 
Back at Spring IDF in early March, Intel announced their new Core™ micro-architecture, replacing the long-in-the-tooth Netburst® architecture design, which finally hit its thermal wall so to speak. Netburst® had a nice five year run but Intel could never get past 3.8GHz due to the resulting excessive heat, which couldn't be adequately dissipated by the cooling subsystem. Enter the Core™ micro-architecture, an evolutionary offshoot of the Pentium M mobile processor design, which puts a major emphasis on lowering power consumption along with Intel's older priority of boosting performance. Intel had to radically move away from its dependence on rising clock frequencies or "digital narcotics" as we've jokingly called it, to achieve their performance gains. In the past few years Intel added their "T's" or technologies to their processors, like Hyper-Threading, XD, EM64T, EIST,  & VT, to enhance performance without raising the clock frequency. The last trick they had left was to add a 2nd core to the mix to increase performance and lower the clock speed, but excessive thermals again proved to be the roadblock of the Netburst® architecture.

To confirm just how important it was for Intel to create such an energy-efficient new processor architecture I think these comments made by Intel Chief Technology Officer Justin Rattner at Spring IDF say it all. "Energy is on everyone's mind. It's the next frontier. Not only has it become a critical concern in our daily lives, it's become a critical concern in just about every platform we have. The amount of energy required to execute a single instruction has increased significantly, well over a factor of four over this time frame. (~13 years)." In 2001 Netburst® (Pentium 4) debuted and had about four times the performance of the original Pentium (1993), but it consumed about 3.5 times the energy per instruction. In 2003 Centrino Mobile Technology arrived with the Pentium M lineage of chips and changed this trend and Intel's way of thinking for all future chip generations. The Pentium M (Banias) consumed the same amount of energy per instruction as the original Pentium but has about 3 times the performance. The Core™ Duo, which came to market in Q1 of this year, has four times the performance and even lower per-instruction consumption than the Pentium M.

The Core™ micro-architecture utilizes a much shorter 14-stage processing pipeline where the workload is divided up in chunks. The Pentium 4 was designed with a very deep 31-stage pipeline. The Pentium M and Core Duo have a slightly shorter 12-stage pipeline. The Core™ micro-architecture is also "wider" with the ability to process four instructions per clock cycle versus prior Intel and AMD generations that can only crunch 3 instructions at the same time. The new Core™ 2 Duos can also process a single 128-bit SSE (Streaming SIMD [Single Instruction Multiple Data] Extension instruction every clock cycle where Pentium 4 and Athlon 64 take two clock cycles. Being able to process these SSE, SSE2 & SSE3 instructions faster substantially speeds up media encoding and transcoding applications. The Core™ micro-architecture also is able to combine processor micro-ops (decoded x86 instructions) and macro-ops (two combined x86 instructions) into one data item and sent through the pipeline in a single cycle, thus effectively issuing 5 instructions per clock cycle in a lot of instances.

Also the Core™ 2 Duos are designed in a "monolithic" fashion where both cores reside on the same die. Because of this design the two cores can access up to a 4MB pool of L2 Cache without having to go out across the very slow front-side bus. This L2 Cache can also be allocated on the fly depending on the task at hand, and if one core is busy it can utilize and access the entire 4MB pool of cache. The cache prefetching routines are also greatly improved, so cache misses are a rarity since the L2 caches are constantly providing the needed data without having to go out to main memory. Intel notes that these prefetching routines are so efficient that main memory latency and bandwidth issues are a thing of the past, and the front-side bus hardly ever gets saturated to impact performance.

Core™ Microarchitecture - Main Features:
 
• Intel Wide Dynamic Execution  delivers more instructions per clock cycle as compared to the Netburst® micro-architecture with a 33% wider execution pipeline allowing each core to execute and complete up to 4 full instructions simultaneously in a single tick of a chip's clock. In addition, two features named micro-op fusion and macro-fusion automatically combines two high-level chip instructions, in some cases into a single instruction, so the Core™ 2 Duo's can effectively issue 5 instructions per clock cycle as compared to the Pentium 4/Pentium D and AMD Athlon 64 families which can only process 3 instructions per clock tick.

• Intel Advanced Smart Cache  includes a shared and multi-core optimized L2 cache that improves performance by dynamically allocating cache to each core depending on workload. Improves how high-speed cache memory is shared by multiple processor cores. For example, it lets one core control the whole cache when the other core is idle, and for other times, it governs how the same data can be shared by both cores.

• Intel Smart Memory Access is an improved set of algorithms that can predict what data should be "prefetched" from main memory into faster cache memory so it's at hand when the processor needs it. Improves performance by using advanced data pre-fetch algorithms that help hide system-memory latency effects. This is also known as memory disambiguation logic and it is great at correctly predicting the order of events and can execute the second instruction before the first one has completed.

• Intel Advanced Digital Media Boost means all "SSE" instructions can execute in a single clock tick. Prior processor families took two clock cycles to process this data. SSE stands for Streaming SIMD (single instruction, multiple data) Extensions and speeds several operations such as video decoding or digital photo processing. Effectively doubles the execution speed for many of the 128-bit SSE/2/3 instructions commonly used in multimedia and graphics applications.

• Intel Intelligent Power Capability allows the electrical shut down of portions of the chip that aren't needed at a particular time to support instruction execution. Optimizes power consumption by intelligently powering on processor-computing elements only when required.